From: SMTP%"weber@evms.enet.dec.com" 13-AUG-1994 21:14:06.00 To: EVERHART CC: Subj: Re: VMS 6.1 vs. Seagate Disk Drives X-Newsgroups: comp.os.vms Subject: Re: VMS 6.1 vs. Seagate Disk Drives Message-Id: <32g87h$8q@nntpd.lkg.dec.com> From: weber@evms.enet.dec.com (Ralph O. Weber -- OpenVMS AXP) Date: 12 Aug 1994 16:32:49 GMT Reply-To: weber@evms.enet.dec.com (Ralph O. Weber -- OpenVMS AXP) Distribution: world Organization: Digital Equipment Corporation, Nashua, NH Nntp-Posting-Host: zapnot.enet.dec.com X-Newsreader: mxrn 6.18-10 Lines: 81 To: Info-VAX@CRVAX.SRI.COM X-Gateway-Source-Info: USENET Jamie, Thanks for all the good words. FYI VMS is working on a version of SCSI disk support that will be more dynamically tolerant of changes in mode page behavior (which is the problem here). The new mode page support will ship in the next major release of OpenVMS for AXP systems. (We are also looking at making similar changes for OpenVMS on VAX systems. However, the new code is written in C and VAX drivers can't be written in C. So, there is a small pile of MACRO-32 rewrite involved.) The new mode page support will tolerate any unexpected mode page behavior except things that affect the mode page bits that VMS must care about. What are the mode page bit that VMS cares about, you might ask. Well, as of the last time I looked, they are shown in the following table. SCSI Mode Page Requirements =========================== AWRE ARRE TB RC PER DTE QERR EECA WCE ==== ==== ==== ==== ==== ==== ==== ==== ==== AXP/SCSI2-project: SCSI2/TCQ/Clust 1/R 1/R 1/R 0/R 1/R 1/P 0/R 0/R 0/P SCSI2/NoTCQ 0/P 0/P 1/R 0/R 1/R 1/P N/A N/A 0/R SCSI1 0/R 0/R 1/R 0/R 1/R 1/P N/A N/A 0/R Non512-blksize D/C D/C 1/R 0/R 1/R 1/P N/A N/A 0/R R = Required, fatal error if not set to desired state. P = Preferred, special success if not set to desired state. D/C = Don't care, leave it untouched. N/A = Not applicable in this category. ----------------------------------------------------------------------------- Bit definitions (from SCSI-2 spec): R/W Error Recovery Page: AWRE An automatic write allocation enabled bit of one indicates that the target shall enable automatic reallocation to be performed during write operations. ARRE An automatic read allocation enabled bit of one indicates that the target shall enable automatic reallocation of defective data blocks during read operations. TB A tansfer block bit of one indicates that a data block that is not recovered within the recovery limits shall be transferred to the initiator before the CHECK CONDITION status is returned. RC A read continuous bit of one indicates that the target shall transfer the entire requested length of data without adding delays to perform the error recovery procedures. PER A post error bit of one indicates that the target shall report recovered errors. DTE A DTE bit of one indicates that the target shall terminate the data phase upon detection of a recovered error. Control Mode Page (TCQ only): QERR A queue error management bit of zero specifies that those commands still queued after the target has entered the contingent allegiance or extended contingent allegiance conditions shall continue execution in a normal manner when that condition has terminated. EECA An enabled extended allegiance bit of one specifies that extended contingent allegiance is enabled. Caching Page: WCE A write cache enable bit of zero indicates that the target shall return GOOD status for a WRITE command after successfully writing all of the data to the medium.