From: system@SendSpamHere.ORG Sent: Monday, April 03, 2000 10:12 AM To: Info-VAX@Mvb.Saic.Com Subject: Re: VAX-Macro problems on Alpha VMS 7.2-1 In article , "Johan Devos" writes: >Hello, > >we have a lot of old VAX macro code adapted a few years ago to Alpha VMS. >This code worked well on Alpha VMS 1.5 to 7.1-2 (compiled with >$MACRO/MIGRATION). > >On the actual Alpha VMS version 7.2-1 we have serious problems with this >macro code. It looks like their is a bug in the new AMAC V4.1-11-3381U >compiler concerning the Autoincrement addressing mode (Rn)+. > >Here a example of a macro routine JED_M where 3 parameters are passed, >- the address of an array of real's (R6) >- the address of a real containing a value to add to all the elements of the >array (R5) >- the number of elements in the array (R3) > >The problem is located in the instruction : ADDF2 (R5),(R6)+ > >On VAX and older Alpha VMS versions, the 2th parameter is added to all >elements of the array. On VMS 7.2- the Autoincrement uses 2 times a offset >of 4 bytes iso. only one time, resulting in a adaptation of the 1st, 3rd, >5th,... element in the array and also a crash at the end of the array. This >error is visible on the $MACRO/MIGRATION/LIST/MACHINE alpha assembler list. > >I have tried to recompile the JED_M macro with all kind of switches (like >/noopt, /disable=quadword,...) whiteout success. > >Thanks for your advise, > >Johan Devos > > >;=========================================================================== >==== >; .ENTRY JED_M,^M > .CALL_ENTRY PRESERVE=,- > MAX_ARGS=3,HOME_ARGS=TRUE,- > INPUT=,OUTPUT=,SCRATCH=,- > LABEL= >;-------------------- >;check parameters in call >; > CMPL (AP),#3 > BGEQ PARAM.OK.OPER >OPER.MIS.PAR: MOVL #-1,R0 > BRW MEM.OPER.END >PARAM.OK.OPER: TSTL 4(AP) ; address of array? > BEQL OPER.MIS.PAR > MOVL 4(AP),R6 > BEQL OPER.MIS.PAR >; > TSTL 8(AP) ; value to add ? > BEQL OPER.MIS.PAR > MOVL 8(AP),R5 ; parameter (list or value) > BEQL OPER.MIS.PAR >; > TSTL 12(AP) ; # elements in array value >? > BEQL OPER.MIS.PAR > MOVL 12(AP),R3 ; parameter (list or value) > BEQL OPER.MIS.PAR >; >; add real @R5 to real array @R6 >; >OFF_RL_RL: ADDF2 (R5),(R6)+ > SOBGTR R3,OFF_RL_RL > BRW MEM.OPER.END The simplest way to cure this is to change the above code to: OFF_RL_RL: ADDF2 (R5),(R6) TSTL (R6)+ SOBGTR R3,OFF_RL_RL BRW MEM.OPER.END There are a number of "documented" strangenesses concerning the update of register values used as pointers. I'm trying to find the documentation I stashed away but don't have it handy presently. If I come across it, I'll post it. In your code above, the compiler appears to be assuming that the F_FLOATING datum is a quadword and not a longword. If this is pervasive in your code, you might want to use a macro to define the above ADDF2/TSTL. Here's a simple macro to handle the problem you are seeing. .MACRO .REDEFINE_ADDF2 .MACRO ADDF2,ARG1,ARG2 .MDELETE ADDF2 .NTYPE ...T,ARG2 .IF EQ <...T@-4&^xF>-8 .IF_TRUE .MACRO ADDF2_TSTL,...ARG1,...ARG2,REGNUM ADDF2 ...ARG1,(R'REGNUM') TSTL ...ARG2 .ENDM ADDF2_TSTL ...R = <...T&^xF> ADDF2_TSTL ARG1,ARG2,\...R .MDELETE ADDF2_TSTL .IF_FALSE ADDF2 ARG1,ARG2 .ENDC .REDEFINE_ADDF2 .ENDM ADDF2 .ENDM .REDEFINE_ADDF2 .REDEFINE_ADDF2 Place this at the beginning of the file and compile. -- VAXman- OpenVMS APE certification number: AAA-0001 VAXman@TMESIS.COM